Production Hardware FAQs

Flux is an AI hardware engineer. It designs complete devices, including boards, firmware, mechanical parts, and wire harnesses. Use these answers to set board requirements and prepare the manufacturing files.

How does Flux handle dynamic flex and repeated bending?

Ask Flux to set up the flex materials and mark the joints that bend repeatedly in use.

Use rolled annealed copper for the flex arm. Set the hinge Flex Joint for repeated bending and choose its minimum bend radius from the flex stackup.

Stagger traces on adjacent flex layers, use hatched ground pours, and keep parts, pads, vias, and holes out of the bend and twist zones.

Estimate the bend-cycle life of this dynamic flex at the saved Flex Joint radius. Use the project's stackup and copper type. Report copper strain, estimated cycles to failure, and the geometric minimum bend radius.

Flux reads the project's stackup, copper type, and Flex Joint bend radius. It calculates copper strain at the bend and applies fatigue models from published copper fatigue research for RA or ED copper to estimate cycles to failure. It also reports the geometric minimum bend radius.

Repeated Bending on a Flex Joint selects the repeated-bend radius check. Flux multiplies the flex stackup thickness by a ratio based on its copper layer count:

Copper layers	One-time assembly bend	Repeated bending
1	6 × thickness	100 × thickness
2	12 × thickness	150 × thickness
3 or more	24 × thickness	200 × thickness

You can choose rolled annealed (RA) or electro-deposited (ED) copper in the stackup. Flux also checks adjacent-layer trace overlap, sharp corners, coverlay openings, and stiffener margins. It flags parts, pads, vias, and holes in deformation zones. It checks plated hole edges within 1.27 mm and pads within 2 mm of a rigid-to-flex boundary.

To set the bend behavior yourself, select the Flex Joint and set Repeated Bending in its layout rules. Use the Review panel's Stackup Areas category to read the flex findings.

See Flex and Rigid-Flex Boards for materials, hatching, coverlay, stiffeners, and flex checks.

How do I define multiple flex layer groups and custom stackups?

Tell Flux which physical layers each area uses, along with the materials, thicknesses, and via configurations.

Create a six-layer rigid stackup. Add one flex area stackup on the two inner copper layers and another flex area stackup for the connector tail. Name each stackup and assign it to its Stackup Area.

Start from the PCBWay Rigid-Flex 6 Layer template and add a stiffened flex area under the connector.

A board has one ordered layer list. Each named area stackup selects a subset of that list and has a Rigid or Flex kind. Multiple flex area stackups can use different layer subsets. A shared copper layer keeps its physical identity across rigid and flex areas. Flux routes on the layers available in each area and uses its allowed via configurations.

In the Stackup Editor, each area stackup selects its own copper and dielectric layers. For selective bonding, include adhesive and bondply layers in the rigid area stackups and leave them out of the flex area stackups.

You can start from generic flex and rigid-flex templates, JLCPCB flex templates, or PCBWay flex and rigid-flex templates. You can edit copper, dielectric, bondply, coverlay, shield, and stiffener layers.

To do it in the UI, open the Stackup Editor. Select a template, then use Add area stackup to define each layer group. Draw a Stackup Area and select its named area stackup in the Inspector.

See Layer continuity between rigid and flex areas and Vias.

How does Flux route and simulate high-speed signals through via transitions?

Give Flux the impedance, pair gap, length, and skew requirements. Ask it to simulate the routed nets and their transitions.

Route the USB differential pair at its impedance target. Keep the pair gap while tuning its length and report the resulting skew.

Simulate the routed pair through its via transitions. Report differential impedance, SDD11, and SDD21, and show the fields around the reference copper.

Flux calculates impedance with microstrip, embedded microstrip, grounded coplanar waveguide, and stripline models. It uses edge-coupled microstrip and stripline models for differential pairs. You can set Controlled Impedance and Controlled Impedance Tolerance on terminals. Use PN Skew Max for pair timing constraints and Pair to Pair Skew Max for bus timing constraints.

Flux routes differential pairs and keeps the pair gap while it tunes route length. You can request pin-to-pin length matching or timing skew targets. Electromagnetic simulation analyzes the routed copper, including via transitions and reference conductors. You can request S11 and S21 for routed nets, or SDD11, SDD21, and differential impedance for pairs. Field maps help you examine coupling and the return path around a transition.

Open Chat and name the nets or pair, frequency range, and requested results. For manual constraint setup, select the part and edit its terminal properties.

See Impedance Control, Length and Skew Tuning, and Signal Integrity Simulation and Review.

What do I send to the fabricator and assembler?

Ask Flux to prepare the format your fabricator requests, together with the assembly files and fabrication drawing.

Apply my fabricator's manufacturing profile and run DRC. Export the Gerber and NC drill files with the fabrication drawing, BOM, and pick-and-place file.

Export this rigid-flex board as ODB++ with its area stackups and fabrication drawing. Prepare an IPC-D-356 netlist for electrical test.

The manufacturing ZIP contains Gerber copper, solder mask, silkscreen, and solder paste layers, plus NC drill files. It includes the BOM and pick-and-place data for assembly and fabrication-drawing.pdf. The drawing has Assembly, Drill, Stackup, Regions, Layers, and Realistic (3D) pages. Its stackup tables show the layers and finished thickness for each stackup.

For flex and rigid-flex boards, the package also includes coverlay, stiffener, and Stackup Area Gerbers, plus stackup-areas.txt. The drawing adds coverlay and stiffener pages. ODB++ and IPC-2581C carry the area stackups and the board regions where they apply.

Select Flux menu → Export → Electronics → Manufacturing Files (Gerbers, etc) (.zip) for the manufacturing ZIP. See Board Manufacturing Files and PCB Fabrication Drawing and Fabrication Notes.

How do I apply my fabricator's rules before export?

Ask Flux to apply the manufacturing profile and check the board and exported files against its rules.

Compare manufacturing profiles for this layer count, trace spacing, and drill size. Apply the profile for my fabricator and run DRC.

Check the exported copper gaps, board outline, silkscreen, BOM, and pick-and-place data. Package the findings and layer images in a report.

Manufacturing profiles apply reusable board rules, including trace width, spacing, drill size, and layer constraints. Flux runs DRC against the selected rules. You can also ask Flux to check the exported board files and compare the assembly data with the board and Gerbers.

In PCB or BOM mode, select Profile in the project left drawer. Choose the profile from Manufacturing Profile.

See Manufacturing Profiles and Design for Manufacturing Checks.

Which manufacturing formats and quotes can I request?

Ask Flux for the file format and quote details you need.

Export IPC-2581C for fabrication and IPC-D-356 for electrical test.

Compare fabrication and assembly quotes for this board using the selected manufacturing profile and quantity.

You can export Gerber and NC drill files, ODB++, IPC-2581C, GenCAD, and an IPC-D-356 test netlist. BOM and pick-and-place exports carry the assembly data. Flux can also compare board fabrication and assembly quotes for the construction and quantity you specify.

Open Chat to request a quote. For exports, select the format under Flux menu → Export → Electronics.

See Board Manufacturing Files for formats and Manufacturing with Flux for the preparation workflow.

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