Signal Integrity Simulation and Review

Flux is an AI hardware engineer. It simulates routed signals and reviews signal integrity across your PCB.

Set impedance targets before routing

Ask Flux to set impedance targets and stackup rules for the interfaces on your board.

Set a 90 ohm target for the USB pair and define the stackup and trace rules.

Set impedance targets for the PCIe lanes from their interface requirements.

Set a 50 ohm target for this signal and choose the stackup layers for its route.

Define impedance rules for the board's DDR, Ethernet, and HDMI nets.

Give Flux the number of layers, board material, interface requirements, and target impedance. Flux can define layer roles and trace rules from those requirements.

Compare routed impedance with the target

Ask Flux to measure routed impedance after routing.

Measure the routed impedance of the USB pair and compare it with the 90 ohm target.

Review the impedance of the PCIe routes against the stackup targets.

Compare the routed trace impedance with the target across the specified frequency range.

Measure impedance on this flex trace using its area stackup.

Flux analyzes routed copper and compares measured impedance with the target. On a flex or rigid-flex board, it uses the stackup of each Stackup Area.

Analyze routed traces and pairs

Ask Flux to simulate a net or pair and name the frequency range and measurements.

Analyze the USB differential pair from 100 MHz to 5 GHz. Report S11, S21, insertion loss, and crosstalk.

Analyze the PCIe pair in differential mode and report SDD11, SDD21, and Zdiff.

Compare impedance and crosstalk on these two routed clock traces.

Analyze the routed via transition and include its S-parameters in the board results.

Flux can report S11 and S21, impedance, insertion loss, and crosstalk. For a differential pair, it can report SDD11, SDD21, and differential impedance (Zdiff). Routed via transitions are part of the board analysis.

Open the Chat panel and name the net or pair, frequency range, and results you need.

Review field maps and coupling

Ask Flux to show the electric and magnetic fields around routed copper.

Show the electric and magnetic field maps around this high-speed pair.

Analyze the near-field coupling from the clock trace to the adjacent data bus.

Compare the field maps for these two route paths.

Review the field behavior around the board's high-speed connector.

Flux can show electric-field and magnetic-field maps. Use the results to review coupling around the routes and their neighboring copper.

Check time-domain response and eye diagrams

Ask Flux to analyze time-domain behavior for a route or pair.

Run TDR on the PCIe pair and show the impedance response through each transition.

Plot the step response of the USB route.

Generate an eye diagram at 16 Gbps and report eye height and eye width.

Review the eye diagram for this lane at 20 Gbps.

Flux can report time-domain reflectometry (TDR), step response, and eye diagrams. An eye diagram reports eye height and width at a bit rate up to 20 Gbps.

Analyze Touchstone files

Ask Flux to compare measurement or vendor data with the routed board.

Plot the attached .s1p file and convert it to impedance.

De-embed the fixture from this .s2p measurement and compare it with the board simulation.

Convert this .s4p file to a time-domain response and show the result.

Compare the vendor Touchstone data with the routed connector and board.

Upload a Touchstone .s1p, .s2p, or .s4p file. Flux can plot it, convert it to impedance or time-domain response, de-embed it, and compare it with the board.

Review signal integrity with Flux

Ask Flux to run signal simulations, review the results, and fix the issues it finds.

Review signal integrity on this board. Run the simulations and fix impedance discontinuities, crosstalk, length mismatch, missing termination, and reference-plane gaps.

Review the DDR and PCIe signals. Report the findings and make the design changes needed to resolve them.

Check the high-speed routes for crosstalk, skew, and traces over reference-plane gaps.

Run a signal-integrity review of the routed board and summarize the fixes.

Flux reviews the simulation results and fixes issues it finds. These issues include impedance discontinuities, excess crosstalk, length or skew mismatch, missing termination, and traces over reference-plane gaps.

For high-speed routing, see Length and Skew Tuning and DDR and PCIe PCB Design.

Last updated on

Was this page helpful?